Filter using a waveguide structure

ABSTRACT

A representative filter comprises a silicon-on-insulator substrate having a top surface, a metal shielding positioned above the top surface of the silicon-on-insulator substrate, and a band-pass filter device positioned above the metal shielding. The band-pass filter device includes a first port, a second port, and a coupling metal positioned between the first and second ports.

TECHNICAL FIELD

The present invention relates to filters.

BACKGROUND

A high performance band-pass filter is typically embedded into asystem-on-a-chip (SOC) using either a micro electro mechanical system(MEMS) or a printed circuit board (PCB) without a silicone substrate.Typically, a MEMS capacitor and/or a metal-air-metal capacitor isprovided as an off-chip component and used to adjust the resonatefrequency of the high performance band-pass filter. The PCB and MEMSdevices are difficult to integrate with very-large-scale integration(VLSI) structures, including millimeter-wave devices andmicroelectronics devices.

Desirable in the art is an improved band-pass filter design.

SUMMARY

A representative filter comprises a silicon-on-insulator substratehaving a top surface, a metal shielding positioned above the top surfaceof the silicon-on-insulator substrate, and a band-pass filter devicepositioned above the metal shielding. The band-pass filter deviceincludes a first port, a second port, and a coupling metal positionedbetween the first and second ports.

The above and other features of the present invention will be betterunderstood from the following detailed description of the preferredembodiments of the invention that is provided in connection with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings illustrate preferred embodiments of theinvention, as well as other information pertinent to the disclosure, inwhich:

FIG. 1 is a view that illustrates a structure of a tunable band-passfilter in accordance with an embodiment of the disclosure;

FIG. 2 is a cross-sectional view that illustrates a tunable band-passfilter in accordance with an embodiment of the disclosure;

FIG. 3 is a view that illustrates a structure of ametal-oxide-semiconductor (MOS) varactor in accordance with anembodiment of the disclosure;

FIG. 4 is a cross-sectional view that illustrates a MOS varactor inaccordance with an embodiment of the disclosure;

FIG. 5 is a capacitance-versus-voltage graph that illustratescapacitance of a MOS varactor at various voltages in accordance with anembodiment of the disclosure; and

FIG. 6 is a cross-sectional view that illustrates a band-pass filter inaccordance with an embodiment of the disclosure.

DETAILED DESCRIPTION

This description of the exemplary embodiments is intended to be read inconnection with the accompanying drawings, which are to be consideredpart of the entire written description. In the description, relativeterms such as “lower,” “upper,” “horizontal,” “vertical,” “above,”“below,” “up,” “down,” “top” and “bottom” as well as derivative thereof(e.g., “horizontally,” “downwardly,” “upwardly,” etc.) should beconstrued to refer to the orientation as then described or as shown inthe drawing under discussion. These relative terms are for convenienceof description and do not require that the apparatus be constructed oroperated in a particular orientation. Terms concerning electricalcommunications and the like, such as, “coupled” and “electricallycoupled” or “electrically connected,” refer to a relationship whereinnodes communicate with one another either directly or indirectly throughintervening structures, unless described otherwise.

FIG. 1 illustrates an embodiment of an integrated circuit tunableband-pass filter 100. The tunable band-pass filter 100 includes ametal-oxide-semiconductor (MOS) varactor 110 and a band-pass filterdevice 105, which, in this example, both are monolithically integratedtogether. The MOS varactor 110 is coupled to a top surface 170 of asilicon-on-insulator (SOI) substrate 165. At least one layer of metalshielding 155, 160 is positioned above the top surface 170 of thesilicon-on-insulator substrate 165.

The band-pass filter device 105 is positioned above the metal shieldinglayers 155, 160. The band-pass filter device 105 includes a first port125, a second port 130, and a coupling metal 135 positioned between thefirst and second ports 125, 130. The first port 125, the coupling metal135, and the second port 130 of the band-pass filter device 105 arearranged on the same plane, atop the metal shielding layer 155, 160 andthe SOI substrate 165, forming a coplanar waveguide (CPW). The metalshielding layers 155, 160 and/or the silicon-on-insulator substrate 165improves coupling effects between the first port 125 and the couplingmetal 135, and between the second port 130 and the coupling metal 135.The metal shielding layer 155, 160 can prevent AC signal of the coplanarwaveguide structure 125, 130, 135 from passing below the coplanarwaveguide structure 125, 130, 135 because the metal shielding layer 155,160 can reduce direct coupling effect with the SOI substrate 165, andenhance port-to-port transmission. The band-pass filter further includesground pads 115 and 120 between which the first port 125, the couplingmetal 135, and the second port 130 are positioned.

The MOS varactor 110 includes a first ground pad 175, a first port 145,and a second port 150, all of which are coupled to thesilicon-on-insulator substrate 165. The first ground pad 175 isimplanted on the SOI substrate 165. The MOS varactor 110 furtherincludes a second ground pad 136 and a direct current (DC) pad 140positioned above the metal shielding layers 155, 160. The first groundpad 175, first port 145, and second port 150 of the MOS varactor 110 arecoupled to the second ground pad 136, the DC pad 140 and the couplingmetal 135 of the band-pass filter device 105, respectively, via aportion of the metal shielding layers 155, 160, metal line 220 (FIG. 2)and conductive vias there between. The MOS varactor 110 and theband-pass filter device 105 are further described in connection withFIG. 2.

It should be noted that the SOI substrate 165 further includes atransistor 180 that is formed as part of a standard MOS IC fabricationprocess. This process can produce a MOS varactor 300 (FIG. 3) with aband-pass filter device 105. The MOS varactor 300 is shown and laterdescribed in connection with FIG. 3.

FIG. 2 is a cross-sectional view of the integrated circuit tunableband-pass filter 100 of FIG. 1. First metal shielding layer 155 includesa set of spaced metal sections positioned above the top surface 170 ofthe silicon-on-insulator substrate 165, and the second metal shieldinglayer 160 includes a set of spaced metal sections positioned above thefirst metal shielding layer. The metal sections of the first metalshielding layer 155 are spaced apart from each other and each sectionextends lengthwise at least from the ground pad 115 to ground pad 120 ofthe band-pass filter device 105.

The metal sections of the second set 160 are positioned above andoverlap the spaces between the metal sections of the first set 155. Asshown in FIG. 2 the coupling effects 205, 210 between the first port 125and the coupling metal 135 of the band-pass filter device 105, andbetween the coupling metal 135 and the second port 130 are improved dueto the metal shielding layer 155, 160. The coplanar waveguide structure125, 130, 135 can transfer the RF signal by coupling RF signal from thefirst port 125 to the second port 130. The RF signal from the first port125 also couples between the coupling metal 13 and the ground pads 115,120. The metal shielding layer 155, 160 and high resistive substrate 165can cause weaker RF coupling (the dashed line) from passing below themetal shielding layer 155, 160 and enhance strong coupling above thecoplanar waveguide structure 125, 130, 135 (the solid line) so that theRF filter characteristics can be shown.

In embodiments, the first port 145 of the MOS varactor 110 is a heavilydoped-N implant region formed in an N-well section 215 of the SOIsubstrate 165 The second port 150 of the MOS varactor 110 can be formedfrom a polysilicon section or line formed on the SOI substrate 165. Thefirst port 145 is coupled to the DC pad 140 by way of metal shieldingsection 155 a, metal shielding section 160 a and metal line 220 a. Thesecond port 150 is coupled to the coupling metal 135 of the band-passfilter device 105 by way of the metal shielding section 155 b, the metalshielding section 160 b, and the metal line 220 b.

Advantageously, the structures shown in FIGS. 1 and 2 can be formedusing conventional complementary metal-oxide-semiconductor (CMOS)processes and silicon-on-insulator (SOI) processing techniques. Themetallization/interconnection layers formed over the substrate can befabricated using copper (or dual copper) damascene processes with low-Kinter-metal dielectrics (IMD) layers.

FIG. 3 illustrates an integrated circuit (IC) structure 300 having analternative embodiment of a MOS varactor, and FIG. 4 is across-sectional view of the IC structure 300. The IC structure 300 issimilar to the structure 100 of FIGS. 1 and 2 and like features arelabeled with the same reference numbers, such as the metal shielding155, 160, first and second ground pads 175, 136, first and second ports145, 150 of the MOS varactor, and the silicon-on-insulator substrate165. The DC pad 140 of the structure 100 is now labeled as asource/drain (S/D) pad 340 in structure 300. However, the IC structure300 does not include a band-pass filter device 105 of FIG. 1. Rather,the structure 300 includes a gate pad 305. The first port 145 and secondport 150 of the structure 300 are coupled to the S/D pad 340 and thegate pad 305, respectively, via a portion of the metal shielding 155,160 and metal line 220. The gate pad 305 and the S/D pad 340 can be usedas inter-finger type with, e.g, 10 um spacing. The S/D pad 340 isconnected to a third port 410 via connection 405 becoming inter-fingertype. The gate pad 305 and S/D pad 340 can have a tunable functionembedded with CPW filter on VLSI technology to form the tunableband-pass filter. Alternatively or additionally, the gate pad 305 andS/D pad 340 can be connected to inductors and MOSFETs to form an LC tankVCO circuit.

FIG. 5 is a capacitance-versus-voltage graph 500 illustratingcapacitances of a MOS varactor formed in an IC structure 300 at variousvoltages in accordance with an embodiment of the disclosure. The MOSvaractor changes capacitance values depending on the amount of voltageinputted at the S/D pad 340. In this particular graph the MOS varactorhas a capacitance of approximately 6×10⁻¹⁴° F. at −1.8 V and increasesto approximately 1.8×10⁻¹³° F. at 1.8 V. The graph 500 further showsthat the measured capacitance values substantially trace the simulatedcapacitance values at a range of voltages.

FIG. 6 is a cross-sectional view of a structure 600 that illustrates aband-pass filter in accordance with an embodiment of the disclosure. Thedifference between the structure 100 of FIG. 1 and the structure 600 isthat the structure 600 does not include a MOS varactor 110; hence, theband-pass filter 600 is not tunable. In addition, the first set of metalsections 155 are positioned directly above the second set of metalsections 160 in structure 600 and the metal shielding 155, 160 of thestructure 600 is positioned in closer proximity to the top surface ofthe silicon-on-insulator substrate 165 than the metal shielding 155, 160of the structure 100. The metal shielding 155, 160 can be approximately0.6 um above the SOI substrate 165; whereas, the metal shielding 155,160 in FIG. 1 is approximately 0.3 um above the SOI substrate 165. Inthis example, the band-pass filter device 105 improves its couplingeffects 505, 510 not only by the metal shielding 155, 160 but also thesilicon-on-insulator substrate 165.

As described herein, structures 100, 600 are presented incorporating atleast one of the following: a MOS varactor 110, a band-pass filterdevice 105, and a metal shielding 155, 160. This approach allows for theuse of a co-planar waveguide in structures 100, 600 to produce band-passfilter characteristic with the metal shielding 155, 160. In addition,the MOS varactor 110 can be embedded into the structure 100 allowing aresonate frequency of the band-pass filter to be tunable with highertuning range and higher accuracy. The structure 100 reduces the physicalarea of a high performance tunable band-pass filter significantlycompared to conventional high performance tunable band-pass filter. Thisapproach has particular benefits for, for example, system-on-a-chip(SOC) and very-large-scale integration (VLSI) silicon-on-insulator (SOI)structures.

Although the invention has been described in terms of exemplaryembodiments, it is not limited thereto. Rather, the appended claimsshould be construed broadly to include other variants and embodiments ofthe invention that may be made by those skilled in the art withoutdeparting from the scope and range of equivalents of the invention.

1. A filter formed in an integrated circuit comprising: asilicon-on-insulator substrate having a top surface; a metal shieldingpositioned above the top surface of the silicon-on-insulator substrate;and a band-pass filter device positioned above the metal shielding,wherein the band-pass filter device includes a first port, a secondport, and a coupling metal positioned between the first and secondports.
 2. The filter of claim 1, wherein the metal shielding includes afirst metal shielding layer comprising a first set of metal sections anda second metal shielding layer comprising a second set of metalsections, wherein the first metal shielding layer is positioned abovethe top surface of the silicon-on-insulator substrate and the secondmetal shielding layer is positioned above the first metal shieldinglayer.
 3. The filter of claim 2, wherein the metal sections of the firstset are laterally spaced apart from each other and each section extendslengthwise at least from the first port to the second port and the metalsections of the second set are positioned above the spaces between themetal sections of the first set.
 4. The filter of claim 3, wherein thefirst set is positioned directly above the second set.
 5. The filter ofclaim 3, wherein the metal sections of the first and second sets arevertically spaced from one another and laterally misaligned so that themetal sections of the second set overlap the spaces between metalsections in first set.
 6. The filter of claim 1, further comprising ametal-oxide-semiconductor (MOS) varactor coupled to thesilicon-on-insulator substrate.
 7. The filter of claim 6, wherein theMOS varactor includes a first ground pad, a first port and a second portcoupled to the silicon-on-insulator substrate.
 8. The filter of claim 7,wherein the MOS varactor further includes a second ground pad and adirect current (DC) pad positioned above the metal shielding, whereinthe first ground pad, first port, and second port of the MOS varactorare coupled to the second ground pad, the DC pad, and the coupling metalof the band-pass filter device, respectively, at least in part throughthe metal shielding.
 9. A structure comprising: a silicon-on-insulatorsubstrate having a top surface; a metal shielding positioned above thetop surface of the silicon-on-insulator substrate; and a band-passfilter device positioned above the metal shielding, wherein theband-pass filter device includes a first port, a second port, and acoupling metal positioned between the first and second ports.
 10. Thestructure of claim 9, wherein the metal shielding includes a first metalshielding layer comprising a first set of metal sections and a secondmetal shielding layer comprising a second set of metal sections, whereinthe first metal shielding layer is positioned above the top surface ofthe silicon-on-insulator substrate and the second metal shielding layeris positioned above the first metal shielding layer.
 11. The structureof claim 10, wherein the metal sections of the first set are laterallyspaced apart from each other and each section extends lengthwise atleast from the first port to the second port, and the metal sections ofthe second set are positioned above the spaces between the metalsections of the first set.
 12. The structure of claim 11, wherein thefirst set is positioned directly above the second set.
 13. The structureof claim 11, wherein the metal sections of the first and second sets arevertically spaced from one another and laterally misaligned so that themetal sections of the second set overlap the spaces between metalsections in first set.
 14. The structure of claim 9, further comprisinga metal-oxide-semiconductor (MOS) varactor coupled to thesilicon-on-insulator substrate.
 15. The structure of claim 14, whereinthe MOS varactor includes a first ground pad, first port and a secondport coupled to the silicon-on-insulator substrate.
 16. The structure ofclaim 15, wherein the MOS varactor further includes a second ground padand a direct current (DC) pad positioned above the metal shielding,wherein the first ground pad, first port, and second port of the MOSvaractor are coupled to the second ground pad, the DC pad, and thecoupling metal of the band-pass filter device, respectively, at least inpart through the metal shielding.
 17. A tunable filter comprising: asilicon-on-insulator substrate having a top surface; a metal shieldingpositioned above the top surface of the silicon-on-insulator substrate;a band-pass filter device positioned above the metal shielding, whereinthe band-pass filter device includes a first port, a second port, and acoupling metal positioned between the first and second ports; and ametal-oxide-semiconductor (MOS) varactor coupled to thesilicon-on-insulator substrate and the band-pass filter device, whereinthe MOS varactor and the band-pass filter are monolithically integratedtogether.
 18. The tunable filter of claim 17, wherein the metalshielding includes a first metal shielding layer comprising a first setof metal sections and a second metal shielding layer comprising a secondset of metal sections, wherein the first metal shielding layer ispositioned above the top surface of the silicon-on-insulator substrateand the second metal shielding layer is positioned above the first metalshielding layer.
 19. The tunable filter of claim 18, wherein the metalsections of the first set are laterally spaced apart from each other andeach section extends lengthwise at least from the first port to thesecond port, and the metal sections of the second set are positionedabove the spaces between the metal sections of the first set.
 20. Thetunable filter of claim 19, wherein the first set engages the secondset.
 21. The tunable filter of claim 17, wherein the MOS varactorincludes a first ground pad, first port and a second port coupled to thesilicon-on-insulator substrate.
 22. The tunable filter of claim 21,wherein the MOS varactor further includes a second ground pad and adirect current (DC) pad positioned above the metal shielding, whereinthe first ground pad, first port, and second port of the MOS varactorare coupled to the second ground pad, the DC pad, and the coupling metalof the band-pass filter device, respectively, at least in part throughthe metal shielding.